Oferty dla Fpga praca Polska

01.04.2026 | Pełny etat | Wrocław | DCV TechnologiesAnd RTOS environments Support high-speed networking bring-up Collaborate closely with engineering teams Contribute to CI/CD-driven development workflows Required Skills C - C+ Python, Bash Embedded Linux (Yocto), Zephyr RTOS, Bare-metal FPGA - Adaptive SoC development PCIe, Ethernet (100GbE) Vivado - Vitis

31.03.2026 | Pełny etat | Gdańsk (Gdańsk) | DCV TechnologiesWe are seeking a Senior IP Design Engineer. The Senior IP Design Engineer will design high-performance IP targeting FPGA and Adaptive SoC technologies, delivering synthesis-ready designs that meet timing and integration requirements. Send CV if you are interested to (jen

31.03.2026 | Pełny etat | Gdańsk (Gdańsk) | DCV TechnologiesAnd RTOS environments Support high-speed networking bring-up Collaborate closely with engineering teams Contribute to CI/CD-driven development workflows Required Skills C - C+ Python, Bash Embedded Linux (Yocto), Zephyr RTOS, Bare-metal FPGA - Adaptive SoC development PCIe, Ethernet (100GbE) Vivado - Vitis

31.03.2026 | Pełny etat | Kraków | DCV TechnologiesAnd RTOS environments Support high-speed networking bring-up Collaborate closely with engineering teams Contribute to CI/CD-driven development workflows Required Skills C - C+ Python, Bash Embedded Linux (Yocto), Zephyr RTOS, Bare-metal FPGA - Adaptive SoC development PCIe, Ethernet (100GbE) Vivado - Vitis

31.03.2026 | Pełny etat | Kraków | Klika Tech sp. z o.o.GPIO, I2C, PWM, and ADC. Experience working with FPGA emulation platforms or RTL simulation environments for early software bring-up. Solid understanding of embedded power management, including sleep modes and wake-up sources. English language proficiency for technical documentation and cross

31.03.2026 | Pełny etat | Poznań | DCV TechnologiesAnd RTOS environments Support high-speed networking bring-up Collaborate closely with engineering teams Contribute to CI/CD-driven development workflows Required Skills C - C+ Python, Bash Embedded Linux (Yocto), Zephyr RTOS, Bare-metal FPGA - Adaptive SoC development PCIe, Ethernet (100GbE) Vivado - Vitis

31.03.2026 | Pełny etat | Kraków | DCV TechnologiesWe are seeking a Senior IP Design Engineer. The Senior IP Design Engineer will design high-performance IP targeting FPGA and Adaptive SoC technologies, delivering synthesis-ready designs that meet timing and integration requirements. Send CV if you are interested to (jen

31.03.2026 | Pełny etat | Gliwice | co.brick sp. z o.o.Devicetree dla systemów Zephyr i FreeRTOS. Pre-silicon development Praca na platformach emulacyjnych FPGA i w środowiskach symulacji RTL. Wymagania 5 lat doświadczenia w embedded (niskopoziomowe drivery, HAL). Głęboka wiedza o architekturze ARM Cortex-M i szeregowaniu zasobów multi-core. Biegłość w C

31.03.2026 | Pełny etat | Poznań | DCV TechnologiesWe are seeking a Senior IP Design Engineer. The Senior IP Design Engineer will design high-performance IP targeting FPGA and Adaptive SoC technologies, delivering synthesis-ready designs that meet timing and integration requirements. Send CV if you are interested to (jen